Name
Abstract | ||
|---|---|---|
This communication presents an optimized architecture providing the computation power and the versatility that are required for the real-time processing of various blocks format (from 4*4 to 16*16) and for direct/inverse Discrete Cosine Transform. To achieve a realistic single chip implementation, different architectures have been compared. Circuits based on the most efficient architecture will be used for a real-time coder/decoder of color images. |
Year | DOI | Venue |
|---|---|---|
1987 | 10.1109/ICASSP.1987.1169851 | Acoustics, Speech, and Signal Processing, IEEE International Conference ICASSP '87. |
Keywords | DocType | Volume |
real time processing,color image,very large scale integration,computational complexity,real time,discrete cosine transform,throughput,color,computer architecture,chip,circuits,decoding | Conference | 12 |
Citations | PageRank | References |
1 | 0.40 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| nicolas demassieux | 1 | 1 | 0.40 |
| g concordel | 2 | 1 | 0.40 |
| jp durandeau | 3 | 1 | 0.40 |
| Francis Jutand | 4 | 16 | 8.86 |