Title
Monitoring BIST by covers
Abstract
The authors show how to combine a conventional built-in self-test method with a simple method for online error detection for combinational circuits. The output sequence of one or more components of the signature analyzer is monitored, in test mode, by an error detection circuit consisting of a one-cover and a zero-cover. The cover circuits need to detect only such faults that are masked by the signature analyzer. Because of a large number of don't-care conditions for the cover circuits the hardware overhead is very low. All faults in the fault model under consideration are detected either by the cover circuits or, due to an erroneous signature, by the signature analyzer
Year
DOI
Venue
1993
10.1109/EURDAC.1993.410639
Hamburg
Keywords
Field
DocType
automatic testing,built-in self test,combinational circuits,design for testability,fault diagnosis,logic design,logic testing,bist,built-in self-test,cover circuits,error detection circuit,hardware overhead,one-cover,online error detection,signature analyzer,zero-cover,fault model,error detection,combinational circuit,hardware,fault detection
Design for testing,Stuck-at fault,Automatic test pattern generation,Computer science,Combinational logic,Electronic engineering,Real-time computing,Electronic circuit,Spectrum analyzer,Fault model,Built-in self-test
Conference
ISBN
Citations 
PageRank 
0-8186-4350-1
2
0.46
References 
Authors
3
2
Name
Order
Citations
PageRank
Michael Gössel120.80
Helmut Jürgensen221.47