Title
Fixed-point digital processing of recursive least-square algorithm toward FPGA implementation of MMSE adaptive array antenna
Abstract
In this paper, we try to implement RLS (recursive least square) algorithm on FPGA with fixed-point operation to be used in 4- elements MMSE (minimum mean square error) adaptive array antenna. RLS algorithm is known to the fast convergence property and broadly used in the optimization process of MMSE adaptive array. An inherent problem of RLS algorithm is the large computational cost. Hence it was difficult to implement on fixed-point DSP (digital signal processor) or FPGA (field programmable gate array). However, the computation must be simplified for the case with small number of array elements. Through some simulations with 4-elements array antenna, we confirm that RLS algorithm can be accurately implemented on fixed-point digital processors.
Year
DOI
Venue
2003
10.1109/ISSPA.2003.1224954
Signal Processing and Its Applications, 2003. Proceedings. Seventh International Symposium
Keywords
Field
DocType
adaptive antenna arrays,adaptive signal processing,array signal processing,field programmable gate arrays,least mean squares methods,optimisation,recursive estimation,FPGA,MMSE adaptive array antenna,digital signal processor,field programmable gate array,fixed-point digital processing,minimum mean square error,recursive least-square algorithm
Digital signal processing,Digital signal processor,Computer science,Real-time computing,Artificial intelligence,Adaptive filter,Fixed point,Computation,Computer vision,Field-programmable gate array,Minimum mean square error,Algorithm,Recursive least squares filter
Conference
Volume
ISBN
Citations 
2
0-7803-7946-2
1
PageRank 
References 
Authors
0.37
3
3
Name
Order
Citations
PageRank
Naoya Matsumoto110.37
koichi ichige233.28
Hiroyuki Arai36413.25