Name
Abstract | ||
|---|---|---|
This paper proposes an advanced spare-connection scheme for k-out-of-n redundancy called “generalized additional bypass linking (ABL)” for total defect-tolerance in large hybrid-WSIs with array structures. The proposed scheme uses bypass links with wired-OR connections to spare processing elements (PEs) without external switches, and can reconfigure complete arrays by tolerating defects in these PEs, links, and external I/O-terminals. The wired-OR connections help to limit the increase in the PE-connections of spare PEs, and these connections are made so that the primary PEs are an inter-PE distance of 3 or more away from each other and are connected to the same bypass link in parallel. The ABL scheme can be used for constructing totally defect-tolerant (TDT) arrays capable of quick broadcasting by using spare circuitries, and it is superior to conventional schemes in terms of extra PE-connections and control of the reconfiguration. This paper describes the basic ABL configurations for series-connected arrays, two-dimensional mesh-connected arrays, and binary trees, and further describes a hierarchical application of the ABL scheme that allows the construction of large arrays using shorter bypass links than the basic ABL configurations |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/DFTVS.1995.476944 | Defect and Fault Tolerance in VLSI Systems |
Keywords | Field | DocType |
VLSI,fault tolerant computing,multichip modules,multiprocessor interconnection networks,parallel processing,redundancy,wafer-scale integration,array structures,binary trees,bypass links,external I/O-terminals,generalized additional bypass linking,hybrid-WSIs,inter-PE distance,k-out-of-n redundancy,processing elements,series-connected arrays,spare circuitries,spare-connection scheme,totally defect-tolerant arrays,two-dimensional mesh-connected arrays,wired-OR connections | Broadcasting,Spare part,Computer science,Binary tree,Real-time computing,Electronic engineering,Redundancy (engineering),Fault tolerance,Concurrent computing,Very-large-scale integration,Control reconfiguration | Conference |
ISSN | ISBN | Citations |
1550-5774 | 0-8186-7107-6 | 5 |
PageRank | References | Authors |
1.67 | 9 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nobuo Tsuda | 1 | 5 | 1.67 |
| Tsutomu Ishikawa | 2 | 16 | 2.93 |
| Yukihiro Nakamura | 3 | 177 | 50.18 |