Paper Info
Title
Automatic detection of logic bugs in hardware designs
Abstract
The verification of complex microprocessor designs is a tough challenge; high-speed hardware emulators can help improve confidence in design correctness by greatly increasing verification throughput. Most attractively, their speed makes it realistic to simulate entire "real-life" application programs, hopefully extending test coverage. The usefulness of this approach is however greatly reduced by the fact that any bugs exposed by real application programs (as opposed to carefully constructed small test cases) are exceedingly difficult to isolate and identify. We have developed a tool that eliminates this problem by completely automating the task of isolating bugs in the hardware design, by periodically comparing execution against a known-good reference model. This new approach has vastly increased the value of our emulation efforts, and found several bugs that escaped the normal test suite. Moreover, bugs that used to take weeks of painstaking work to isolate have been identified automatically by our tool in a matter of hours.
Year
DOI
Venue
2003
10.1109/MTV.2003.1250262
MTV
Keywords
Field
DocType
fault simulation,logic testing,microprocessor chips,automatic logic bug detection,hardware emulator,logic bug isolation,microprocessor design verification,real-life application program simulation
Test suite,Logic synthesis,Code coverage,Reference model,Computer science,Correctness,Real-time computing,Computer hardware,Computer architecture,Bebugging,Emulation,Test case,Embedded system
Conference
ISBN
Citations 
PageRank 
0-7695-2045-6
1
0.35
References 
Authors
0
2
Name
Order
Citations
PageRank
Alexander Klaiber110.35
Sinclair Chau210.35