Paper Info
Title
A 433-MHz 64-b quad-issue RISC microprocessor
Abstract
A quad-issue custom VLSI microprocessor is described. This microprocessor implements the Alpha architecture and achieves an estimated performance of 13.3 SPECint9S and 18.4 SPECfp95 at 433 MHz. The 9.6 million transistor die measures 14.4 mm×14.5 mm, and is fabricated in a 0.35-μm, four-metal layer CMOS process. This chip dissipates less than 25 W at 433 MHz using a 2.0 V internal power supply. The design was leveraged from a prior 300-MHz, 3.3-V, 0.50-μm CMOS design. It includes several significant architectural enhancements and required circuit solutions for operation at 2.0 V. The chip will operate at nominal internal power supply voltages up to 2.5 V allowing improved performance at the cost of increased power consumption. At 2.5 V, the chip operates at 500 MHz and delivers 15.4 SPECint95 (est) and 21.1 SPECfp95 (est). This paper describes the chip implementation details and the strategy for efficiently migrating the existing design to the 0.35-μm technology
Year
DOI
Venue
1996
10.1109/JSSC.1996.542313
Solid-State Circuits, IEEE Journal of
Keywords
DocType
Volume
cmos digital integrated circuits,vlsi,microprocessor chips,reduced instruction set computing,0.35 micron,2 to 2.5 v,25 w,433 to 500 mhz,64 bit,alpha architecture,chip implementation,custom vlsi microprocessor,four-metal layer cmos process,quad-issue risc microprocessor,chip
Journal
31
Issue
ISSN
Citations 
11
0018-9200
20
PageRank 
References 
Authors
41.60
2
19
Name
Order
Citations
PageRank
paul e gronowski12041.60
p bannon22041.60
r p blakecampos32041.60
gregg a bouchard42041.60
w j bowhill52041.60
david a carlson62041.60
Ruben W. Castelino7155164.96
dale r donchin82041.60
richard fromm935268.67
m k gowan102041.60
anil k jain112642.72
Bruce J. Loughlin1264106.62
s mehta132041.60
Jeanne E. Meyer1411199.94
r o mueller152041.60
a olesin162041.60
t n pham172041.60
Ronald P. Preston18305262.84
Paul I. Rubinfeld19171161.38