Name
Abstract | ||
|---|---|---|
This paper presents a decomposition method for speed- independent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesizes each output individually. It begins by contract- ing the STG to include only transitions on the output of interest and its trigger signals. Next, the reachable state space for this contracted STG is analyzed to determine a minimal number of additional signals which must be rein- troduced into the STG to obtain CSC. The circuit for this output is then synthesized from this STG. Results show that the quality of the circuit implementation is nearly as good as the one found from the full reachable state space, but it can be applied to find circuits for which full state space methods cannot be successfully applied. The proposed method has been implemented as a part of our tool nutas (Nii-Utah Timed Asynchronous circuit Syn- thesis system), and its very fir st version is available at http://research.nii.ac.jp/ yoneda. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/ASYNC.2004.1299295 | ASYNC |
Keywords | Field | DocType |
asynchronous circuits,graph theory,high level synthesis,CSC,STG,additional signals,circuit implementation,decomposition method,nutas,output synthesis,reachable state space,speed independent circuits,synthesis cost reduction,timed asynchronous circuit synthesis system,trigger signals | Graph theory,Abstraction,Computer science,High-level synthesis,Parallel computing,Circuit design,Decomposition method (constraint satisfaction),Electronic circuit,State space,Decomposition | Conference |
ISSN | ISBN | Citations |
1522-8681 | 0-7695-2133-9 | 14 |
PageRank | References | Authors |
0.85 | 13 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomohiro Yoneda | 1 | 353 | 41.62 |
| Hiroomi Onda | 2 | 14 | 0.85 |
| Chris J. Myers | 3 | 39 | 5.21 |