Name
Abstract | ||
|---|---|---|
The advent of new electronic packaging technologies has fueled the drive towards rapid integration of digital and analog functions particularly in portable computing and communications applications. This integration of digital and analog circuits into closely coupled mixed-signal circuits has brought with it, many challenges in the design and test areas. The problem in testing mixed-signal circuits arises from the simple fact that digital and analog fault models are inherently different. Moreover, while digital fault models are well understood (i.e. stuck-at faults), analog fault models are not quite as well-defined and mature. Another key problem stems from the fact that analog signals are inherently imprecise. Hence, with any analog measurement one must associate an accuracy of measurement. For large systems, it therefore becomes necessary to incorporate design for testability and built-in self-test (BIST) features in order to achieve high coverage of digital and analog faults. Also, with use of these features, fault simulation and test generation becomes easier. In the following paper, the authors discuss recent work in the area of design for testability and BIST. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/ICVD.1997.568158 | VLSI Design |
Keywords | Field | DocType |
built-in self test,design for testability,integrated circuit testing,mixed analogue-digital integrated circuits,BIST,DFT methods,built-in self-test,design for testability,fault simulation,mixed-signal circuits,test generation | Design for testing,Stuck-at fault,Automatic test pattern generation,Analogue electronics,Computer science,Electronic engineering,Analog signal,Mixed-signal integrated circuit,Electronic circuit,Computer engineering,Built-in self-test | Conference |
ISSN | ISBN | Citations |
1063-9667 | 0-8186-7755-4 | 13 |
PageRank | References | Authors |
1.05 | 27 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chatterjee, A. | 1 | 13 | 1.05 |
| Nagi, N. | 2 | 13 | 1.05 |