Name
Abstract | ||
|---|---|---|
The paper presents a unique approach to improve yield given a routed layout. Currently after routing has been completed and compacted, it generally proceeds to verification without further modifications. However, to improve manufacturability, the authors introduce a concept called even wire distribution, a key element of the SURF physical design tool. To alleviate congestion, they first move vias and wires towards less dense areas in a manner which preserves the existing wiring paths. Depending on the locally available area, they then increase wire spacing to reduce defect sensitivity, without changing the area of the design. Carafe, an inductive fault analysis tool is used to evaluate the new layout. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/ICCAD.1997.643615 | San Jose, CA, USA |
Keywords | Field | DocType |
circuit layout CAD,circuit optimisation,design for manufacture,fault diagnosis,integrated circuit yield,network routing,printed circuit layout,Carafe,SURF physical design tool,congestion alleviation,defect sensitivity reduction,even wire distribution,improved yield,inductive fault analysis tool,locally available area,manufacturability,post-route optimization,routed layout,rubber-band wiring model,verification,vias,wire spacing,wires,wiring paths | Network routing,Computer science,Inductive fault analysis,Design methods,Routing congestion,Electronic engineering,Critical area,Physical design,Design for manufacturability,Rubber band | Conference |
ISSN | ISBN | Citations |
1092-3152 | 0-8186-8200-0 | 10 |
PageRank | References | Authors |
0.56 | 9 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jeffrey Z. Su | 1 | 10 | 0.56 |
| Wayne W. Dai | 2 | 10 | 0.56 |