Paper Info
Title
Design and implementation of multiplierless adjustable fractional-delay all-pass filters
Abstract
This paper describes an algorithm for finding the multiplierless coefficient representations for adjustable fractional-delay (AFD) all-pass filters. The optimization is performed in three basic steps. First, an initial filter is generated using a simple design scheme. Second, this filter is used as a start-up solution for the nonlinear optimization algorithm which is employed for determining a parameter space of the infinite-precision coefficients. This space includes the feasible space where the filter meets the given criteria. The third step involves finding the discrete coefficient values in this space so that the resulting filter meets the criteria with the simplest coefficient representation forms. Examples are included for illustrating the efficiency of the proposed synthesis scheme. In addition, the performance and the complexity of the multiplierless AFD all-pass filters are compared with those of the multiplierless AFD finite-impulse response filters implemented using the modified Farrow structure proposed by Vesma and Saramaki (1997). This comparison shows that the number of adders for the resulting filters are in the best case less than 50 percent compared with those implemented using the modified Farrow structure.
Year
DOI
Venue
2005
10.1109/ISCAS.2005.1464965
ISCAS (2)
Keywords
Field
DocType
adders,all-pass filters,circuit optimisation,delay filters,digital filters,adders,all-pass filters,multiplierless adjustable fractional-delay filters,multiplierless coefficient representations,nonlinear optimization,parameter space
Digital signal processing,Digital filter,Adder,Computer science,Control theory,Nonlinear programming,Electronic engineering,Parameter space,Finite impulse response,Signal processing algorithms
Conference
ISSN
ISBN
Citations 
0271-4302
0-7803-8834-8
3
PageRank 
References 
Authors
0.42
0
2
Name
Order
Citations
PageRank
Juha Yli-Kaakinen121225.99
Tapio Saramaki220628.51