Paper Info
Title
False path analysis based on a hierarchical control representation
Abstract
False path analysis is an activity with applications in a variety of computer science and engineering domains like for instance high-level synthesis, worst case execution time estimation, software testing etc. In this paper a method to automate false path analysis, based on a control flow graph connected to a hierarchical BDD based control representation, is described. By its ability to reason on predicate expressions involving arithmetic inequalities, this method overcomes certain limitations of previous approaches. Preliminary experimental results confirm its effectiveness.
Year
DOI
Venue
1998
10.1109/ISSS.1998.730597
Proceedings of the 11th international symposium on System synthesis
Keywords
Field
DocType
binary decision diagrams,data flow analysis,control flow graph,false path analysis,hierarchical BDD,high-level synthesis,worst case execution time
Worst-case execution time,Control flow graph,Expression (mathematics),Computer science,Algorithm,Data-flow analysis,Real-time computing,Theoretical computer science,False path,Predicate (grammar),Computer Science and Engineering,Basis path testing
Conference
ISSN
ISBN
Citations 
1080-1820
0-8186-8623-5
3
PageRank 
References 
Authors
0.44
15
2
Name
Order
Citations
PageRank
Apostolos A. Kountouris110710.82
Christophe Wolinski229728.34