Abstract | ||
---|---|---|
The authors present a framework for tailoring fault tolerant approaches for both permanent and transient faults to the specific needs of an application. In particular, they address methodologies for encoding fault isolation properties in calculation duplication to allow permanent fault identification, an efficient approach to post-identification reconfiguration using graceful degradation instead of spares, and an error recovery technique which actually recovers from previously detected errors in parallel with future calculations, thus achieving zero-error latency. In conjunction, these techniques provide an efficient alternative to traditional triplication and rollback schemes, and allow significant tailoring of area/resiliency trade-offs for individual designs. |
Year | DOI | Venue |
---|---|---|
1998 | 10.1109/54.735924 | Design & Test of Computers, IEEE |
Keywords | Field | DocType |
application specific integrated circuits,fault tolerance,integrated circuit design,area-resiliency trade-offs,fault-tolerant approaches,permanent faults,rollback schemes,self-recovering ASIC design,transient faults | Stuck-at fault,Fault coverage,Computer science,Software fault tolerance,Electronic engineering,Application-specific integrated circuit,Fault (power engineering),Integrated circuit design,Fault tolerance,Rollback,Embedded system | Journal |
Volume | Issue | ISSN |
15 | 4 | 0740-7475 |
Citations | PageRank | References |
4 | 0.47 | 12 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Samuel N. Hamilton | 1 | 10 | 2.35 |
Alex Orailoglu | 2 | 1449 | 151.01 |