Abstract | ||
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We report a 10+ Gb/s serial link demo chip with NRZ signaling in 90-nm CMOS. It consists of a full-rate 4:1 MUX with 8-tap feed-forward equalizer, a half-rate 1:4 DEMUX with programmable peaking pre-amplifier, and a parallel port interface. All coefficients of the 8-tap FIR filter have programmable polarity and magnitude. The chip is housed in CBGA package and has ESD protection devices on all pin... |
Year | DOI | Venue |
---|---|---|
2005 | 10.1109/JSSC.2005.848177 | IEEE Journal of Solid-State Circuits |
Keywords | DocType | Volume |
Packaging,Transmitters,Optical signal processing,Feedforward systems,Equalizers,Finite impulse response filter,Electrostatic discharge,Protection,Pins,Clocks | Journal | 40 |
Issue | ISSN | Citations |
9 | 0018-9200 | 0 |
PageRank | References | Authors |
0.34 | 0 | 8 |
Name | Order | Citations | PageRank |
---|---|---|---|
S. Rylov | 1 | 0 | 0.34 |
S. Reynolds | 2 | 0 | 0.34 |
D. Storaska | 3 | 0 | 0.68 |
B. Floyd | 4 | 0 | 0.34 |
M. Kapur | 5 | 0 | 0.34 |
Thomas Zwick | 6 | 146 | 22.56 |
S. Gowda | 7 | 40 | 7.28 |
M. Sorna | 8 | 0 | 0.34 |