Name
Abstract | ||
|---|---|---|
A digital method has been introduced previously for testing the interconnections between signal pins within high-density substrates such as multichip modules. This technique, while very effective at detecting and diagnosing catastrophic faults (complete opens and low-resistance shorts), has limited sensitivity to “near” failures (resistive opens and high-resistance shorts). This paper quantifies the sensitivity of the original method for detecting several classes of near failures. The sensitivity is found to be on the order of 100 Ω for both near opens and near shorts in a typical implementation. To improve upon this, a significant variation on the original method is introduced. Rather than rely entirely on resistance differences to produce detectable voltage variations, the new approach couples these with a fixed capacitance to produce an RC rise-time change. The fault is then diagnosed with greater precision while still using fixed-threshold comparators |
Year | DOI | Venue |
|---|---|---|
1998 | 10.1109/TEST.1998.743156 | Washington, DC |
Keywords | Field | DocType |
failure analysis,fault diagnosis,integrated circuit interconnections,multichip modules,sensitivity analysis,substrates,100 ohm,RC rise-time change,catastrophic faults,detectable voltage variations,fixed capacitance,fixed-threshold comparators,high-resistance shorts,low-resistance shorts,multichip modules,parallel test,resistive opens,sensitivity,substrate interconnections | Comparator,Capacitance,System testing,Computer science,Logic testing,Resistive touchscreen,Voltage,Field-programmable gate array,Electronic engineering,On resistance,Electrical engineering | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-7803-5093-6 | 1 |
PageRank | References | Authors |
0.48 | 1 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| David C. Keezer | 1 | 45 | 9.64 |
| Kimberly Newman | 2 | 7 | 2.48 |
| Davis, J.S. | 3 | 1 | 0.48 |