Name
Abstract | ||
|---|---|---|
To reduce manufacturing variation due to chemical-mechanical polishing and to improve yield, layout must be made uniform with respect to density criteria. This is achieved by layout postprocessing to add fill geometries, either at the foundry or, for better convergence of performance verification flows, during layout synthesis. This paper proposes a new min-variation objective for the synthesis of fill geometries. Within the so-called fixed dissection regime (where density bounds are imposed on a predetermined set of windows in the layout), we exactly solve the min-variation objective using a linear programming formulation. We also state criteria for fill pattern synthesis, and discuss additional criteria that apply when fill, must be grounded for predictability of circuit performance. We believe that density control for CMP will become an important research topic in the VLSI design-manufacturing interface over the next several years |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/ICVD.1999.745133 | VLSI Design |
Keywords | Field | DocType |
VLSI,chemical mechanical polishing,integrated circuit layout,integrated circuit technology,linear programming,semiconductor process modelling,VLSI design-manufacturing interface,chemical-mechanical polishing,fill pattern synthesis,filling algorithm,fixed dissection,layout density control,linear programming,min-variation objective,yield | Integrated circuit layout,Convergence (routing),Predictability,Computer science,Circuit extraction,IC layout editor,Electronic engineering,Linear programming,Physical design,Very-large-scale integration | Conference |
ISSN | ISBN | Citations |
1063-9667 | 0-7695-0013-7 | 14 |
PageRank | References | Authors |
1.83 | 2 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Andrew B. Kahng | 1 | 7582 | 859.06 |
| G. Robins | 2 | 185 | 28.16 |
| Singh, A. | 3 | 14 | 1.83 |
| A. Zelikovsky | 4 | 289 | 38.30 |