Title
Scalable implementation of H.263 video encoder on a parallel DSP system
Abstract
A parallel implementation of H.263 video encoder is presented for video conferencing applications. The parallel mapping has low communication and memory requirements and is scalable, which allows encoding of any of the five standard H.263 picture formats in real-rime. The presented parallelization method is implemented in a linearly expandable multiprocessor system called PARNEU, which includes very versatile communication topology. With the prototype system using four ADSP-21062 DSPs, a real-time encoding is achieved with QCIF sized picture. Performance estimations given for a larger system show very good speed-up figures
Year
DOI
Venue
2000
10.1109/ISCAS.2000.857154
ISCAS
Keywords
Field
DocType
digital signal processing chips,multiprocessing systems,parallel processing,teleconferencing,video coding,adsp-21062 dsp,h.263 video encoder,parneu,qcif picture,communication topology,multiprocessor system,parallel mapping,real-time encoding,video conferencing,concurrent computing,field programmable gate arrays,encoding,real time systems,videoconference,digital signal processing,real time,digital signal processors,video compression
Teleconference,Computer science,Field-programmable gate array,Electronic engineering,Multiprocessing,Encoder,Concurrent computing,Computer hardware,Data compression,Embedded system,Encoding (memory),Scalability
Conference
Volume
ISBN
Citations 
1
0-7803-5482-6
3
PageRank 
References 
Authors
0.51
1
4
Name
Order
Citations
PageRank
Kolinummi, P.130.51
Sarkijarvi, J.230.51
Timo Hämäläinen31603194.30
Jukka Saarinen426446.21