Name
Abstract | ||
|---|---|---|
Estimates of the peak power dissipation and the peak current are required in the design of reliable VLSI circuits. The peak current current drawn by a digital filter is dependent on the filter coefficients and the inputs to the multipliers in the filter. This input dependence makes the estimation of peak current for a digital filter a hard problem. We present a technique to estimate the maximum current drawn by a digital filter. The approach consists of: (1) building peak current macro-models for multipliers in terms of the input data transitions and the coefficient, and (2) using these models in a graph based formulation for finding the peak current of the digital filter. The peak current macro-models for multipliers are validated by comparisons with SPICE simulations. We also present the application of the technique for estimating the peak current of digital filters in a 51.84 Mb/s 16-CAP receiver. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1109/ICASSP.2000.860093 | Acoustics, Speech, and Signal Processing, 2000. ICASSP '00. Proceedings. 2000 IEEE International Conference |
Keywords | Field | DocType |
CMOS digital integrated circuits,VLSI,digital filters,electric current,graph theory,receivers,semiconductor device models,16-CAP receiver,51.84 Mbit/s,CMOS gates,Peak current estimation,SPICE simulations,digital filters,filter coefficients,graph based formulation,input data transitions,input dependence,multipliers,peak current macro-models,peak power dissipation,reliable VLSI circuits | Mathematical optimization,Digital filter,Half-band filter,Computer science,Control theory,Dissipation,Spice,Electronic engineering,Adaptive filter,Very-large-scale integration,Filter design,Electric current | Conference |
Volume | ISSN | ISBN |
6 | 1520-6149 | 0-7803-6293-4 |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. Bobba | 1 | 110 | 16.06 |
| Hajj, I.N. | 2 | 46 | 6.13 |