Name
Abstract | ||
|---|---|---|
This paper describes the design of CMOS millimeter-wave voltage controlled oscillators. Varactor, transistor, and inductor designs are optimized to reduce the parasitic capacitances. An investigation of tradeoff between quality factor and tuning range for MOS varactors at 24 GHz has shown that the polysilicon gate lengths between 0.18 and 0.24 μm result both good quality factor (>12) and Cmax/Cmin ratio (∼3) in the 0.13-μm CMOS process used for the study. The components were utilized to realize a VCO operating around 60 GHz with a tuning range of 5.8 GHz. A 99-GHz VCO with a tuning range of 2.5 GHz, phase noise of -102.7 dBc/Hz at 10-MHz offset and power consumption of 7-15mW from a 1.5-V supply and a 105-GHz VCO are also demonstrated. This is the CMOS circuit with the highest fundamental operating frequency. The lumped element approach can be used even for VCOs operating near 100-GHz and it results a smaller circuit area. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/JSSC.2006.874321 | Solid-State Circuits, IEEE Journal of |
Keywords | DocType | Volume |
CMOS integrated circuits,inductors,transistors,varactors,voltage-controlled oscillators,0.13 micron,0.18 to 0.24 micron,1.5 V,105 GHz,2.5 GHz,24 GHz,5.8 GHz,7 to 15 mW,99 GHz,CMOS circuit,CMOS millimeter wave voltage controlled oscillator,VCO,lumped element approach,optimized inductor design,optimized transistor design,optimized varactor design,parasitic capacitance,polysilicon gate,quality factor,CMOS,MOS varactor,lumped model,millimeter wave,quality factor,transmission line,voltage-controlled oscillator (VCO) | Journal | 41 |
Issue | ISSN | Citations |
6 | 0018-9200 | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |