Title
Efficient synthesis of array intensive computations onto FPGA based accelerators
Abstract
Array intensive computations are characterized by processing of large arrays stored in external memory in multiple loops. Synthesizing these computations onto FPGAs involves automatic translation of the behavioral description into state machines controlled by a clock such that the execution time of the program as a whole is the minimum and area requirement does not exceed a predefined limit. The synthesis algorithm also needs to efficiently sequence the array, accesses taking into account memory access requirements such as pipelining. In this paper we present two algorithms each with a specific emphasis to handle this synthesis problem. Our heuristic algorithm generates good solutions in a very short time (less than a second), while our mixed integer linear programming (MILP) based algorithm can generate optimal solution given sufficient time. Both try to minimize execution time and area. Our algorithms not only look at individual loops to exploit parallelism but also consider them together while deciding the clock. The overall execution time is minimized and not just the number of cycles or the cycle time. They also efficiently synthesize memory accesses to fully exploit the memory pipelining. We compare these two algorithms in terms of their relative strengths
Year
DOI
Venue
2001
10.1109/ICVD.2001.902677
VLSI Design
Keywords
Field
DocType
field programmable gate arrays,finite state machines,high level synthesis,integer programming,linear programming,FPGA based accelerators,area requirement,array intensive computations,automatic translation,behavioral description,cycle time,execution time,heuristic algorithm,memory pipelining,mixed integer linear programming,multiple loops,pipelining,state machines
Pipeline (computing),Heuristic (computer science),Computer science,Parallel computing,High-level synthesis,Field-programmable gate array,Real-time computing,Finite-state machine,Electronic engineering,Integer programming,Linear programming,Auxiliary memory
Conference
ISSN
ISBN
Citations 
1063-9667
0-7695-0831-6
0
PageRank 
References 
Authors
0.34
7
4
Name
Order
Citations
PageRank
u nagaraj shenoy1554.77
Prithviraj Banerjee22763337.99
Alok N. Choudhary326024.04
Mahmut T. Kandemir47371568.54