Title
Thyristor-Based Volatile Memory in Nano-Scale CMOS
Abstract
A thyristor-based memory cell technology provides SRAM-like performance at 2times to 3times the density of conventional 6T SRAM. The technology is readily embedded into conventional nano-scale CMOS and scales into future SOI and FinFET technologies. A 19mm2 0.13mum 9Mb SOI test chip has a 0.562mum2 cell with a cell-R/W time <2ns
Year
DOI
Venue
2006
10.1109/ISSCC.2006.1696327
San Francisco, CA
Keywords
DocType
ISSN
cmos memory circuits,sram chips,nanoelectronics,thyristors,0.13 micron,9 mbyte,finfet technologies,soi test chip,sram-like performance,nanoscale cmos,thyristor-based volatile memory,chip
Conference
0193-6530
ISBN
Citations 
PageRank 
1-4244-0079-1
0
0.34
References 
Authors
2
8
Name
Order
Citations
PageRank
rabindra k roy100.34
farid nemati200.34
k young300.34
bruce bateman400.34
r chopra500.34
Seong-ook Jung633253.74
chiming show700.34
hyunjin cho800.34