Name
Abstract | ||
|---|---|---|
Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). One of the main difficulties in using EHW to solve real-world problems is scalability, which limits the size of the circuit that may be evolved. This paper outlines a new type of decomposition strategy for EHW, the "generalized disjunction decomposition" (GDD), which allows the evolution of large circuits. The proposed method has been extensively tested, not only with multipliers and parity bit problems traditionally used in the EHW community, but also with logic circuits taken from the Microelectronics Center of North Carolina (MCNC) benchmark library and randomly generated circuits. In order to achieve statistically relevant results, each analyzed logic circuit has been evolved 100 times, and the average of these results is presented and compared with other EHW techniques. This approach is necessary because of the probabilistic nature of EA; the same logic circuit may not be solved in the same way if tested several times. The proposed method has been examined in an extrinsic EHW system using the (1 + lambda) evolution strategy. The results obtained demonstrate that GDD significantly improves the evolution of logic circuits in terms of the number of generations, reduces computational time as it is able to reduce the required time for a single iteration of the EA, and enables the evolution of larger circuits never before evolved. In addition to the proposed method, a short overview of EHW systems together with the most recent applications in electrical circuit design is provided. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TSMCB.2006.872259 | IEEE transactions on systems, man, and cybernetics. Part B, Cybernetics : a publication of the IEEE Systems, Man, and Cybernetics Society |
Keywords | DocType | Volume |
evolutionary computation,logic circuits,logic design,reconfigurable architectures,electrical circuit design,evolutionary algorithm,evolvable hardware system,generalized disjunction decomposition strategy,logic circuit,self-reconfiguration hardware design,Adaptive system,evolutionary computation,evolvable hardware (EHW),problem decomposition | Journal | 36 |
Issue | ISSN | Citations |
5 | 1083-4419 | 51 |
PageRank | References | Authors |
1.91 | 69 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Emanuele Stomeo | 1 | 63 | 3.25 |
| Tatiana Kalganova | 2 | 195 | 15.96 |
| Cyrille Lambert | 3 | 63 | 3.25 |