Name
Abstract | ||
|---|---|---|
The need for both speed and increased precision in modern digital signal processing (DSP) applications represents a serious implementation obstacle. The paper explores the arithmetic benefits provided by the residue number system (RNS) for the design of such systems. Specifically, the fusion of the RNS with the popular distributed arithmetic (DA) is considered for the implementation of a discrete wavelet transform (DWT) filter bank. An exhaustive comparison of the advantages of RNS-DA over the traditional two's complement design, 2C-DA, is carried out for field-programmable logic (FPL), and cell-based ASIC technologies. The results show that the reported RNS-DA methodology, compared to a traditional 2C-DA design, enjoys a significant performance advantage that increases with precision. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1109/ICASSP.2001.941137 | ICASSP '01). 2001 IEEE International Conference |
Keywords | Field | DocType |
application specific integrated circuits,digital filters,digital signal processing chips,discrete wavelet transforms,distributed arithmetic,field programmable gate arrays,residue number systems,2C-DA,RNS-based distributed arithmetic DWT filterbanks,cell-based ASIC,digital signal processing,discrete wavelet transform,field-programmable logic,residue number system | Digital signal processing,Digital filter,Computer science,Filter bank,Artificial intelligence,Discrete wavelet transform,Residue number system,System on a chip,Pattern recognition,Field-programmable gate array,Arithmetic,Application-specific integrated circuit,Embedded system | Conference |
Volume | ISSN | ISBN |
2 | 1520-6149 | 0-7803-7041-4 |
Citations | PageRank | References |
2 | 0.43 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Javier Ramírez | 1 | 656 | 68.23 |
| Antonio García | 2 | 266 | 32.01 |
| Meyer Base, U. | 3 | 2 | 0.43 |
| F. Taylor | 4 | 10 | 4.77 |