Name
Abstract | ||
|---|---|---|
An FPGA with field-programmable Vth components can attain both high performance and low power consumption, without placement and routing constraints, by flexibly controlling the threshold voltage (Vth) of transistors. Since Vth for transistors for a specific circuit block in an FPGA is chosen from a set of Vth values defined by body bias voltage set (BBVS), adequate selection of BBVS is important in the design decision process in a field-programmable Vth method. In this paper, the effect of the selection of BBVS on static power reduction in an FPGA with field-programmable Vth components was presented. To select the optimal BBVS among several supplied body bias voltage candidates, several BBVSs are provided. The results show that the best BBVS achieves remarkable static power reduction, to as little as 1/30 the value in a conventional FPGA without performance degradation. In addition, the study on the optimal selection of body bias voltage for high-Vth transistor in a BBVS reveals that deep reverse body bias for high-Vth transistor does not necessarily offer the optimal condition, and optimization is necessary |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/FPT.2006.270340 | Bangkok |
Keywords | DocType | ISBN |
field programmable gate arrays,low-power electronics,power consumption,FPGA bias voltage,body bias voltage set,deep reverse body bias,field-programmable threshold voltage,static power reduction | Conference | 0-7803-9729-0 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Takashi Kawanami | 1 | 41 | 4.70 |
| Hioki, M. | 2 | 0 | 0.34 |
| Yoshio Matsumoto | 3 | 639 | 95.45 |
| Toshiyuki Tsutsumi | 4 | 59 | 7.28 |