Name
Abstract | ||
|---|---|---|
Abstract—Multiple-Input Multiple-Output (MIMO) systems are of significant interest due,to their ability to increase,the capacity of wireless communications systems, but for these to be useful they must,also be practical for implementation,in VLSI circuits. A particularly,difficult part of these systems is the decoder, where the optimal maximum-likelihood (ML) solution is desirable, but cannot be directly implemented due to its exponential,complexity. The paper presents the first published,8×8 MIMO detection engine with an integrated channel preprocessing unit, achieving near-ML BER results at 57.6Mbps, using QPSK in an extended HSDPA application. Other novelties include,the high,speed sorting mechanism and power saving features. I. PROBLEM BACKGROUND Multiple-Input Multiple-Output (MIMO) systems utilise |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/SIPS.2006.352614 | Banff, Alta. |
Keywords | Field | DocType |
MIMO communication,VLSI,maximum likelihood decoding,wireless channels,57.6 Mbit/s,HSDPA application,MIMO near-ML decoder engine,QPSK,VLSI circuits,high speed sorting mechanism,integrated channel preprocessing unit,multiple-input multiple-output system,optimal maximum-likelihood solution,power saving features,very large scale integration,wireless communication system | Wireless communication systems,3G MIMO,Computer science,Communication channel,MIMO,Real-time computing,Sorting,Preprocessor,Very-large-scale integration,Phase-shift keying | Conference |
ISSN | ISBN | Citations |
1520-6130 E-ISBN : 1-4244-0383-9 | 1-4244-0383-9 | 6 |
PageRank | References | Authors |
0.57 | 8 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Knagge, G. | 1 | 6 | 0.57 |
| Bickerstaff, M. | 2 | 6 | 0.57 |
| Brett Ninness | 3 | 629 | 67.59 |
| Weller, Steven R. | 4 | 151 | 11.29 |