Name
Abstract | ||
|---|---|---|
In recent times, the 1149.1 TAP and TAP controller have begun to play a more important role in accessing embedded logic that is not specifically limited to 1149.1's scope as a board-test standard. This logic, referred to by the generic term instruments, includes manufacturing test and design-for-test (DFT) logic; design-for-debug/diagnosis (DFD) logic; design-for-yield (DFY) logic and monitors; and in-system verification logic (such as hardware assertions). The P1687 IJTAG standard working group was created to investigate formalizing and standardizing this use of the 1149.1 controller - and after a little more than a years worth of effort has produced a hardware architecture proposal that is currently being used as a strawman to investigate and develop the description and protocol language effort. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/TEST.2007.4437656 | Santa Clara, CA |
Keywords | Field | DocType |
design for testability,logic design,logic devices,logic testing,1149.1 TAP controller,IJTAG,P1687 IJTAG standard working group,TAP controller,board-test standard,description language,design-for-debug logic,design-for-diagnosis logic,design-for-test logic,design-for-yield logic,embedded logic devices,generic term instruments,hardware architecture proposal,in-system verification logic,manufacturing test,organized instrument connectivity,protocol language | Design for testing,Logic synthesis,Computer architecture,Control theory,Computer science,Logic testing,Real-time computing,Electronic engineering,Register-transfer level,Hardware architecture,Embedded system | Conference |
ISSN | ISBN | Citations |
1089-3539 E-ISBN : 978-1-4244-1128-3 | 978-1-4244-1128-3 | 15 |
PageRank | References | Authors |
1.82 | 3 | 1 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alfred L. Crouch | 1 | 15 | 1.82 |