Paper Info
Title
Efficient driving-capability programmable frequency divider with a wide division ratio range
Abstract
A programmable frequency divider with close-to-50% output duty-cycle, with a wide division ratio range, is presented. The proposed divider has also provisions for binary division ratio controls, and has demonstrated operation at frequencies as high as 3.5 GHz. With the above features, the proposed divider can be used in phase-locked loops, and is capable of driving various clocked circuits, which need different clock frequencies. The proposed divider has division ratios from 8 to 510, but it can easily be extended to higher ranges by simply adding more divider stages. The divider circuit has been realised in a 0.18-mum RF CMOS process. Test results show that the output duty-cycle is 50% when the division ratio is an even number. For odd division ratios the worst-case duty-cycle is 44.4% when the division ratio is 9. The output duty-cycle becomes closer to 50% when the division ratio is an increasing odd number. For each division ratio, the output duty-cycle remains constant for different chips, with different input frequencies from gigahertz down to kilohertz ranges, and with different power supply voltages.
Year
DOI
Venue
2007
10.1049/iet-cds:20070150
Circuits, Devices & Systems, IET
Keywords
Field
DocType
CMOS integrated circuits,MMIC,frequency dividers,phase locked loops,programmable circuits,RF CMOS process,binary division ratio controls,clocked circuits,output duty-cycle,phase-locked loops,programmable frequency divider
Current divider,Phase-locked loop,Frequency divider,CMOS,Electronic engineering,Synchronous circuit,Electronic circuit,Electrical engineering,Mathematics,Voltage divider,Wilkinson power divider
Journal
Volume
Issue
ISSN
1
6
1751-858X
Citations 
PageRank 
References 
1
0.37
8
Authors
3
Name
Order
Citations
PageRank
Zhang, M.110.37
Syed K. Islam23512.71
M. R. Haider361.63