Title
High Throughput Architecture for Forward Transforms Module of H.264/AVC Video Coding Standard
Abstract
This paper presents a high throughput hardware architecture for forward transforms module of H.264/AVC video coding standard. The designed architecture can reach 303 MHz, when mapped to a Xilinx Virtex II Pro FPGA, and it is able to process 4.9 billion of samples per second. This throughput allows the use of the designed architecture in H.264/AVC codecs targeting real time when processing high resolution videos. This high throughput is very important to reduce the intra-prediction coding time, as will be explained in this paper. This architecture is able to process 1,561 HDTV 1080p frames per second. Comparing this design with published works was possible to conclude that this solution presents the best throughput among all other solutions.
Year
DOI
Venue
2007
10.1109/ICECS.2007.4510952
Marrakech
Keywords
Field
DocType
codecs,field programmable gate arrays,image resolution,prediction theory,transform coding,video coding,H.264/AVC video coding standard,Xilinx Virtex II Pro FPGA,codecs,forward transforms module,frequency 303 MHz,high resolution videos,high throughput hardware architecture,intra-prediction coding time
1080p,Computer science,Field-programmable gate array,Transform coding,Electronic engineering,Virtex,Throughput,Codec,Context-adaptive binary arithmetic coding,Hardware architecture
Conference
ISBN
Citations 
PageRank 
978-1-4244-1378-2
3
0.42
References 
Authors
5
4
Name
Order
Citations
PageRank
Roger Endrigo Carvalho Porto130.42
Marcelo Schiavon Porto27933.49
Sergio Bampi3184.10
luciano agostini4609.52