Title
A HW/SW co-simulation framework for the verification of multi-CPU systems
Abstract
This work focuses on the HW/SW co-simulation of complex systems consisting of several independent CPUpsilas (multi-CPU systems) such as multi-processor system-on-chip (MPSoC) and wireless sensor networks. The verification of such systems requires the efficient evaluation of hardware-software interactions in several processing units. We present a HW/SW co-simulation framework consisting of a timing-accurate interaction of a SystemC simulator with an array of instruction set simulators (ISS). Tests with up to one hundred ISSpsilas show that the proposed framework exploits the power of todaypsilas multi-processor hosts and represents a valuable tool for the validation of not only eight-core MPSoCpsilas but also large sensor networks.
Year
DOI
Venue
2008
10.1109/HLDVT.2008.4695888
Incline Village, NV
Keywords
Field
DocType
hardware description languages,hardware-software codesign,instruction sets,logic simulation,logic testing,microprocessor chips,multiprocessing systems,HW/SW co-simulation framework,MPSoC,SystemC simulator,complex system,instruction set simulator,multiCPU system verification,multiprocessor system-on-chip,timing-accurate interaction,wireless sensor network
Computer architecture,Instruction set,Computer science,Instruction set simulator,SystemC,Real-time computing,Logic simulation,Co-simulation,Wireless sensor network,MPSoC,Hardware description language,Embedded system
Conference
ISSN
ISBN
Citations 
1552-6674
978-1-4244-2922-6
3
PageRank 
References 
Authors
0.59
11
4
Name
Order
Citations
PageRank
Stefano Cordibella130.59
Franco Fummi21001111.62
Giovanni Perbellini311611.43
Davide Quaglia419025.14