Title
Design method for monolithic DC-DC converters based on the losses optimization of the power stage
Abstract
A design method for efficient monolithic hard-switching converters is proposed in this paper. A power loss model of the power stage including the driver circuits is defined. Based on this model and taking as reference the 0.35 mum CMOS technology from AMS a buck converter is designed. For a given set of operating conditions, the power loss model defined permits to optimize the design parameters for the power stage like the gate-driver tapering factor and the width of the power MOSFET. Extracted circuit simulation results of a buck converter design example operating at 100 MHz switching frequency on layout stage are presented.
Year
DOI
Venue
2008
10.1109/APCCAS.2008.4746409
APCCAS
Keywords
Field
DocType
DC-DC power convertors,driver circuits,integrated circuit design,buck converter design,driver circuits,frequency 100 MHz,hard-switching converters,losses optimization,monolithic DC-DC converters,power stage
Computer science,Power semiconductor device,Power MOSFET,Power factor,CMOS,Converters,Electronic engineering,Integrated circuit design,Electronic circuit,Electrical engineering,Buck converter
Conference
ISBN
Citations 
PageRank 
978-1-4244-2342-2
1
0.39
References 
Authors
6
3
Name
Order
Citations
PageRank
Vitor Costa1274.27
Pedro M. Santos210.73
Beatriz Borges332.48