Abstract | ||
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Recent success in brain-machine interfaces has provided hope for patients with spinal-cord injuries, Parkinson's disease, and other debilitating neurological conditions, and has boosted interest in electronic recording of cortical signals. State-of-the-art recording solutions rely heavily on analog techniques at relatively high supply voltages to perform signal conditioning and filtering, leading to large silicon area and limited programmability. We present a neural interface in 65nm CMOS and operating at a 0.5V supply that obtains performance comparable or superior to state-of-the-art systems in a silicon area over 3x smaller. These results are achieved by using a scalable architecture that avoids on-chip passives and takes advantage of high-density logic. The use of 65nm CMOS eases integration with low-power digital systems, while the low supply voltage makes the design more compatible with wireless powering schemes. |
Year | DOI | Venue |
---|---|---|
2011 | 10.1109/JSSC.2011.2163552 | Solid-State Circuits Conference Digest of Technical Papers |
Keywords | DocType | Volume |
CMOS integrated circuits,analogue-digital conversion,digital-analogue conversion,medical signal detection,CMOS process,DC-coupled neural signal acquisition IC,area-efficient neural signal-acquisition system,bandwidth 10 kHz,boxcar sampling ADC,dual mixed-signal servo loop,noise-efficient DAC topology,per-pixel digitization,power 5 muW,size 65 nm,system-level complexity,voltage 0.5 V,Area-efficient,CMOS,biomedical,boxcar sampling,brain–machine interface,low noise,low power,medical implants,mixed-signal architecture,offset cancellation,sensor interface | Conference | 47 |
Issue | ISSN | ISBN |
1 | 0018-9200 | 978-1-61284-303-2 |
Citations | PageRank | References |
19 | 1.08 | 0 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Rikky Muller | 1 | 87 | 12.53 |
Simone Gambini | 2 | 294 | 31.64 |
Jan M. Rabaey | 3 | 4796 | 1049.96 |