Title
Incorporating graceful degradation into embedded system design
Abstract
In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of the applications depending on the fault, an approach is presented that optimizes the systems structure and behavior with respect to a possible graceful degradation. It includes a degradation-aware reliability analysis that guides the optimization of the resource allocation and function distribution, and provides data-structures for an efficient online degradation algorithm. Thus, the proposed methodology covers both, the design phase with a structural optimization and the online phase with a behavioral optimization of the system. A case study shows the effectiveness of the proposed approach.
Year
DOI
Venue
2009
10.1109/DATE.2009.5090681
Nice
Keywords
Field
DocType
data structures,embedded systems,fault tolerant computing,logic design,degradation-aware reliability analysis,embedded system design,function distribution,graceful degradation,resource allocation
Logic synthesis,Boolean function,Data structure,Algorithm design,Computer science,Embedded system design,Real-time computing,Space exploration,Fault tolerance,Resource allocation,Reliability engineering
Conference
ISSN
ISBN
Citations 
1530-1591
978-1-4244-3781-8
9
PageRank 
References 
Authors
0.57
11
4
Name
Order
Citations
PageRank
Michael Glaß190.57
Lukasiewycz, M.2583.09
Christian Haubelt3152.11
Jürgen Teich4243.69