Title
Packet capturing on parallel architectures
Abstract
Nowadays commodity hardware is offering an ever increasing degree of parallelism: CPUs are equipped with more and more cores and a new generation of NICs can dispatch packets across multiple queues. Software based network monitoring can leverage the opportunity offered by this new trend in order to target a level of performance which was unattainable with single core technologies. In this paper, which is the result of a thorough measurement campaign, we explore the potential of parallelism when coupled with existing packet capturing technologies and show how, by accurately tuning configurations, a huge performance gain can be obtained. We also show how minimal configuration changes can dramatically affect the overall throughput.
Year
DOI
Venue
2011
10.1109/IWMN.2011.6088500
M&N
Keywords
Field
DocType
parallel architectures,cpu,commodity hardware,multiple queues,packet capturing,parallel architecture,software based network monitoring,tuning configuration,network monitoring,instruction sets,layout,kernel,engines,hardware,parallel processing
Kernel (linear algebra),Single-core,Computer science,Instruction set,Degree of parallelism,Network packet,Software,Network monitoring,Throughput,Distributed computing,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-4577-0455-0
2
0.59
References 
Authors
3
4
Name
Order
Citations
PageRank
Nicola Bonelli1708.72
Di Pietro, A.2143.86
Stefano Giordano360986.56
Procissi, G.420.59