Name
Abstract | ||
|---|---|---|
Demand for programmable devices for space applications is increasing day by day to support hardware repair functions, hardware update functions, and hardware acceleration for space systems. To meet those needs, one candidate is an optically reconfigurable gate array (ORGA) because the ORGA can be reconfigured with invalid configuration data that are damaged by high-energy charged particles in a radiation-rich space environment The amount of configuration data damage that can be sustained by ORGAs is greater than that by FPGAs with error checking and correction (ECC). An ORGA is therefore extremely robust in terms of its configuration data. Moreover, the ORGA's programmable gate array is reconfigurable at nanosecond order, with more than 100 reconfiguration contexts. For that reason, high-speed repair and update are possible. However, an ORGA's programmable gate array itself is never as robust against space radiation as that of an application-specific integrated circuit (ASIC) because the gate array's programmable architecture is identical to that of an FPGA. Therefore, this paper presents a proposal of a triple module redundancy scheme on an ORGA to achieve the same robust ability as that of ASICs. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ISOCC.2011.6138757 | ISOCC |
Keywords | DocType | ISBN |
application specific integrated circuits,error correction,integrated optoelectronics,optical logic,programmable logic arrays,reconfigurable architectures,redundancy,asic,fpga,orga programmable gate array,application specific integrated circuit,configuration data damage,error checking,gate array programmable architecture,hardware acceleration,hardware repair function,hardware update function,high energy charged particle,high-speed repair,optically reconfigurable gate array,programmable device,radiation-rich space environment,reconfiguration context,space radiation application,space system,triple module redundancy scheme,maintenance engineering,charged particles,logic gates,field programmable gate array,hardware accelerator,logic gate,adaptive optics,field programmable gate arrays,hardware,robustness | Conference | 978-1-4577-0710-0 |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Torigai, Y. | 1 | 0 | 0.34 |
| Minoru Watanabe | 2 | 137 | 43.46 |