Paper Info
Title
Dynamic voltage and frequency scaling in parallel network processors
Abstract
In this paper, we consider energy-aware network devices (e.g. routers, switches, etc.) able to trade their energy consumption for packet forwarding performance by means of DVFS techniques. We focus on state-of-the-art packet processing engines, which generally represent the most energy-starving components of network devices, and which are often composed of a number of parallel pipelines to “divide and conquer” the incoming traffic load. Our goal is to control both the power configuration of pipelines, and the way to distribute traffic flows among them, in order to optimize the trade-off between energy consumption and network performance indexes. With this aim, we propose and analyze a constrained optimization policy, which tries to find the best trade-off between power consumption and packet latency times. In order to deeply understand the impact of such policy, a number of tests have been performed by using real-world traffic traces.
Year
DOI
Venue
2012
10.1109/HPSR.2012.6260857
High Performance Switching and Routing
Keywords
Field
DocType
optimisation,parallel architectures,pipeline processing,power aware computing,DVFS technique,constrained optimization policy,divide and conquer,dynamic voltage scaling,energy consumption,energy-aware network device,energy-starving component,frequency scaling,packet forwarding,packet latency times,parallel network processor,parallel pipeline,power consumption,traffic load,adaptive rate,green networking,low power idle
Network processor,Computer science,Network packet,Networking hardware,Computer network,Real-time computing,Packet processing,Frequency scaling,Network traffic control,Energy consumption,Packet forwarding
Conference
ISSN
ISBN
Citations 
Pending E-ISBN : 978-1-4577-0832-9
978-1-4577-0832-9
4
PageRank 
References 
Authors
0.48
14
3
Name
Order
Citations
PageRank
Raffaele Bolla1183.77
Roberto Bruschi261.51
Chiara Lombardo371.26