Paper Info
Title
Power-aware Manhattan Routing on Chip Multiprocessors
Abstract
We investigate the routing of communications in chip multiprocessors (CMPs). The goal is to find a valid routing in the sense that the amount of data routed between two neighboring cores does not exceed the maximum link bandwidth while the power dissipated by communications is minimized. Our position is at the system level: we assume that several applications, described as task graphs, are executed on a CMP, and each task is already mapped to a core. Therefore, we consider a set of communications that have to be routed between the cores of the CMP. We consider a classical model, where the power consumed by a communication link is the sum of a static part and a dynamic part, with the dynamic part depending on the frequency of the link. This frequency is scalable and it is proportional to the throughput of the link. The most natural and widely used algorithm to handle all these communications is XY routing: for each communication, data is first forwarded horizontally, and then vertically, from source to destination. However, if it is allowed to use all Manhattan paths between the source and the destination, the consumed power can be reduced dramatically. Moreover, some solutions may be found while none existed with the XY routing. In this paper, we compare XY routing and Manhattan routing, both from a theoretical and from a practical point of view. We consider two variants of Manhattan routing: in single-path routing, only one path can be used for each communication, while multi-paths routing allows to split a communication between different routes. We establish the NP-completeness of the problem of finding a Manhattan routing that minimizes the dissipated power, we exhibit the minimum upper bound of the ratio power consumed by an XY routing over power consumed by a Manhattan routing, and finally we perform simulations to assess the performance of Manhattan routing heuristics that we designed.
Year
DOI
Venue
2012
10.1109/IPDPS.2012.27
Parallel & Distributed Processing Symposium
Keywords
Field
DocType
circuit complexity,graph theory,microprocessor chips,multiprocessing systems,network routing,power aware computing,CMP,Manhattan path,Manhattan routing heuristics,NP-completeness,XY routing,chip multiprocessor,communication link,dissipated power,link frequency,link throughput,maximum link bandwidth,multipath routing,power consumption,power-aware Manhattan routing,single-path routing,system level,task graph,Manhattan,chip multiprocessor,complexity,energy,multi-paths,power,single-path
Multipath routing,Link-state routing protocol,Equal-cost multi-path routing,Dynamic Source Routing,Static routing,Computer science,Policy-based routing,Parallel computing,Computer network,Destination-Sequenced Distance Vector routing,Geographic routing,Distributed computing
Conference
ISSN
ISBN
Citations 
1530-2075
978-1-4673-0975-2
4
PageRank 
References 
Authors
0.45
14
4
Name
Order
Citations
PageRank
Anne Benoit134233.74
Rami Melhem22537164.09
Paul Renaud-Goud3356.57
Yves Robert484270.03