Name
Abstract | ||
|---|---|---|
This paper presents the test instruction set architecture (TISA), an invention that can enable scalable interactive testing to leverage the experience of embedded computing. This approach is applied to an 1149.1 system, obtaining a processor able to efficiently handle instrument-based operations. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/TEST.2009.5355811 | Austin, TX |
Keywords | Field | DocType |
instruction sets,integrated circuit testing,logic CAD,1149.1 system,embedded computing,instrument-based operation,integrated test architecture,processor,scalable interactive testing,test instruction set architecture | Architecture,Computer architecture,Instruction set,Computer science,Interactive testing,Real-time computing,Software,Maintenance engineering,Embedded system,Scalability | Conference |
ISSN | ISBN | Citations |
1089-3539 | 978-1-4244-4867-8 | 0 |
PageRank | References | Authors |
0.34 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Michele Portolan | 1 | 5 | 1.59 |
| suresh goyal | 2 | 120 | 13.77 |
| Bradford G. Van Treuren | 3 | 4 | 2.47 |