Paper Info
Title
Kernel analysis for architecture design trade off in convolution-based image filtering
Abstract
Intending to improve design trade offs in image processing architectures this work presents some kernel analysis for convolution-based image filtering. Some well-known filter kernels have been analyzed in order to identify symmetries and to allow the development of alternative architectures that can contribute to reduce power consumption and/or FPGA resources, maintaining or improving the overall system throughput. The separable kernel technique is also analyzed, and two architectures were developed and tested. Additionally, a technique based on overlapping kernels have been developed, analyzed and tested. All architectures were implemented and synthesized using Altera Quartus II EDA software and prototyped in four real-time image processing platforms. These platforms are composed by a CMOS camera, four Terasic FPGA development kits (with Altera devices) and an LCD. Synthesis, simulations and real-time results show the suitability of such architectures for this kind of design trade off.
Year
DOI
Venue
2012
10.1109/SBCCI.2012.6344453
Integrated Circuits and Systems Design
Keywords
Field
DocType
convolution,field programmable gate arrays,filtering theory,image processing,Altera Quartus II EDA software,CMOS camera,FPGA resources,LCD,Terasic FPGA development kits,architecture design trade off,convolution-based image filtering,four real-time image processing platforms,image processing architectures,kernel analysis,separable kernel technique,well-known filter kernels
Kernel (linear algebra),Altera Quartus,Computer science,Convolution,Filter (signal processing),Image processing,Field-programmable gate array,Electronic engineering,CMOS sensor,Electronic design automation
Conference
ISBN
Citations 
PageRank 
978-1-4673-2606-3
4
0.44
References 
Authors
5
3
Name
Order
Citations
PageRank
Jones Yudi Mori1204.96
Carlos H. Llanos29318.22
Pedro A. Berger361.50