Paper Info
Title
Reducing communication costs on Dynamic Networks-on-Chip through runtime relocation of tasks
Abstract
Incremental on-line scheduling of tasks on reconfigurable devices may lead to suboptimal placements of tasks, in particular when communicating tasks and components have to be placed far apart due to the current device occupation. This includes computing modules, memories and peripherals and leads to high latency and high network bandwidth in Dynamic Networks-on-Chip, thus reducing the performance of applications. Relocation of tasks at runtime provides a way to optimize the placement of tasks with the goal of reducing communication distance between communication partners, resulting in an increase of performance of the whole system. In this work, we introduce a communication-aware on-line scheduler, as well as relocation strategies to cope with the drawback of device fragmentation. By selecting a feasible relocation task set, reordering the selected tasks and replace them, we are able to show an improvement of up to 25% in communication costs, with a lower rejection rate of tasks.
Year
DOI
Venue
2012
10.1109/RSP.2012.6380708
Rapid System Prototyping
Keywords
Field
DocType
network-on-chip,processor scheduling,communication cost reduction,communication-aware on-line scheduler,computing modules,device fragmentation,dynamic networks-on-chip,incremental on-line scheduling,memories,peripherals,reconfigurable devices,runtime relocation,suboptimal placements,task relocation
Drawback,Relocation,Scheduling (computing),Latency (engineering),Computer science,Network on a chip,Real-time computing,Bandwidth (signal processing),Processor scheduling,Rejection rate,Embedded system
Conference
ISSN
ISBN
Citations 
2150-5500 E-ISBN : 978-1-4673-2788-6
978-1-4673-2788-6
3
PageRank 
References 
Authors
0.42
14
2
Name
Order
Citations
PageRank
Philipp Mahr1546.34
Christophe Bobda262790.57