Name
Abstract | ||
|---|---|---|
Multiple international video standards in the market have been developed successfully for many commercial products. This paper proposes a new multimedia core and multi-core architecture for multi-standard video decoding. The proposed multimedia core is based on the 6-stage pipelined dual issue VLIW+SIMD architecture and efficient instructions for video decoding. SMIC 130nm process is used for implementation of the proposed architecture whose approximate gate count is about 130K and runs at 125MHz. The multi-core architecture consisting of eight multimedia cores is efficient for parallel decoding of various video compression formats including MPEG-2, MPEG-4, AVS and H.264/AVC. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/ISOCC.2012.6406916 | ISOCC |
Keywords | Field | DocType |
data compression,decoding,multimedia systems,multiprocessing systems,parallel architectures,pipeline processing,video coding,6-stage pipelined dual issue,avs,h.264/avc,mpeg-2,mpeg-4,smic process,vliw+simd architecture,frequency 125 mhz,gate count,international video standard,multicore architecture,multimedia core,multistandard video decoding,parallel decoding,size 130 nm,video compression format,multi-core,multimedia processor,video decoding,multi core | Video processing,Gate count,Architecture,Computer science,Very long instruction word,Multiview Video Coding,Real-time computing,Decoding methods,Data compression,Multi-core processor | Conference |
ISSN | ISBN | Citations |
2163-9612 | 978-1-4673-2988-0 | 3 |
PageRank | References | Authors |
1.51 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jae-Jin Lee | 1 | 27 | 8.69 |
| Kyungjin Byun | 2 | 7 | 3.31 |
| Nak-Woong Eum | 3 | 31 | 9.55 |