Name
Title | ||
|---|---|---|
A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression |
Abstract | ||
|---|---|---|
Further power and energy reductions via technology and voltage scaling have become extremely difficult due to leakage and variability issues. In this paper, we present a robust and energy-efficient computation architecture exploiting an asynchronous timing strategy to dynamically minimize leakage and to self-adapt to process variations and different operating conditions. Based on a logic topology with built-in leakage suppression, the prototype asynchronous neural signal processor demonstrates robust sub-threshold operation down to 0.25 V, while consuming only 460 nW in 0.03 in a 65 nm CMOS technology. These results represent a 4.4 reduction in power, a 3.7 reduction in energy and a 2.2 reduction in power density, when compared to the state-of-the-art processors. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/JSSC.2013.2239096 | Solid-State Circuits, IEEE Journal of |
Keywords | Field | DocType |
Adaptive design,asynchronous circuits,energy-efficient circuits,neural signal processor,subthreshold CMOS circuits,ultra low voltage (ULV) design,variation-aware | Asynchronous communication,Asynchronous system,Leakage (electronics),Computer science,Digital signal processor,Voltage,Power density,Electronic engineering,CMOS,Asynchronous circuit | Journal |
Volume | Issue | ISSN |
48 | 4 | 0018-9200 |
Citations | PageRank | References |
13 | 1.08 | 6 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tsung-Te Liu | 1 | 112 | 9.03 |
| Jan M. Rabaey | 2 | 4796 | 1049.96 |