Title
A 3.1 mW Continuous-Time ΔΣ Modulator With 5-Bit Successive Approximation Quantizer for WCDMA
Abstract
In this paper, we present a multibit continuous-time delta-sigma modulator based on a 5-bit successive approximation quantizer. The use of successive approximation, instead of flash, is driven by the desire to reduce the quantizer power and area. The quantizer delay is effectively compensated to ensure system stability. The modulator is implemented in a 130 nm CMOS technology and achieves 62 dB of dynamic range over 1.92 MHz while consuming 3.1 mW from a 1.2 V supply.
Year
DOI
Venue
2010
10.1109/JSSC.2010.2047423
Solid-State Circuits, IEEE Journal of
Keywords
Field
DocType
CMOS integrated circuits,code division multiple access,delta-sigma modulation,5-bit successive approximation quantizer,CMOS technology,WCDMA,continuous-time ΔΣ modulator,delta-sigma modulator,frequency 1.92 MHz,power 3.1 mW,quantizer delay,size 130 nm,voltage 1.2 V,$DeltaSigma$ modulator,Continuous-time,data-weighted-averaging,dynamic element matching,excess loop delay,low-power,oversampling,successive approximation
Dynamic range,Oversampling,Computer science,Shaping,CMOS,Modulation,Delta-sigma modulation,Electronic engineering,Quantization (signal processing),Electrical engineering,Low-power electronics
Journal
Volume
Issue
ISSN
45
8
0018-9200
Citations 
PageRank 
References 
16
1.08
10
Authors
4
Name
Order
Citations
PageRank
Mohammad Ranjbar11368.76
Arash Mehrabi2161.08
Omid Oliaei37520.09
Frederic Carrez4161.08