Name
Title | ||
|---|---|---|
Suppression of Flicker Noise Up-Conversion in a 65-nm CMOS VCO in the 3.0-to-3.6 GHz Band |
Abstract | ||
|---|---|---|
Flicker noise up-conversion in voltage-biased oscillators can be effectively suppressed by inserting resistances in series to the drain of the transconductor MOSFETs. This solution avoids the degradation of the start-up margin and the adoption of area-demanding resonant filters with proper tuning. This paper presents a detailed theoretical analysis of 1/f noise up-conversion and quantitatively addresses the impact of two major contributions, namely the Groszkowski effect and the loop delay caused by stray capacitances at the drain node of the transistors. A simple flow for the design of an oscillator with suppressed flicker noise up-conversion is presented which is based on first-order closed-form formulas. Finally , theoretical estimates are compared to experimental results on a 65-nm CMOS VCO covering the 3.0-3.6 GHz band. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/JSSC.2013.2273181 | Solid-State Circuits, IEEE Journal of |
Keywords | DocType | Volume |
CMOS analogue integrated circuits,MOSFET,interference suppression,microwave integrated circuits,microwave oscillators,voltage-controlled oscillators,1-f noise,CMOS VCO,Groszkowski effect,drain node,first-order closed-form formulas,flicker noise up-conversion suppression,frequency 3.0 GHz to 3.6 GHz,loop delay,resonant filters,size 65 nm,start-up margin,stray capacitances,transconductor MOSFET,voltage-biased oscillators,Cyclostationary noise,flicker noise,harmonic distortion,impulse sensitivity function (ISF),oscillator nonlinearity,phase noise,voltage-controlled oscillator | Journal | 48 |
Issue | ISSN | Citations |
10 | 0018-9200 | 7 |
PageRank | References | Authors |
0.73 | 18 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pepe, F. | 1 | 7 | 1.07 |
| Andrea Bonfanti | 2 | 269 | 36.37 |
| Levantino, S. | 3 | 209 | 21.99 |
| C. Samori | 4 | 241 | 26.26 |