Title | ||
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Multidimensional Householder based high-speed QR decomposition architecture for MIMO receivers |
Abstract | ||
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Conventional QR decomposition (QRD) hardware with a large size of channel matrix suffers from very low throughput and large latencies. This paper presents a high speed multi-dimensional (M-D) coordinate rotation digital computer (CORDIC) based QRD architecture. The novel high speed M-D architecture is enabled by exploiting multiple annihilations in a single CORDIC operation and removing data dependencies between two CORDIC operations (evaluation and application CORDIC) in Householder-based QRD process. The proposed QRD architecture can compute 4×4 complex R matrix for every 8 clock cycles. Our QRD hardware for 4×4 channel matrix was implemented using Samsung 0.13μm CMOS process, and the experimental results show that the proposed architecture achieves 4.74x speed-up compared to the conventional hybrid M-D based QRD. |
Year | DOI | Venue |
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2013 | 10.1109/ISCAS.2013.6572302 | Circuits and Systems |
Keywords | Field | DocType |
CMOS integrated circuits,MIMO communication,digital arithmetic,matrix decomposition,radio receivers,signal processing,wireless channels,MD CORDIC,MIMO receiver,QRD,Samsung CMOS process,channel matrix,high-speed QR decomposition hardware architecture,multidimensional coordinate rotation digital computer,multidimensional householder,size 0.13 mum | Signal processing,Computer science,Matrix (mathematics),Parallel computing,Matrix decomposition,Communication channel,MIMO,Electronic engineering,CORDIC,Throughput,QR decomposition | Conference |
ISSN | ISBN | Citations |
0271-4302 | 978-1-4673-5760-9 | 5 |
PageRank | References | Authors |
0.52 | 9 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Iput Heri Kurniawan | 1 | 5 | 0.52 |
Ji-Hwan Yoon | 2 | 20 | 1.98 |
Jongsun Park | 3 | 323 | 50.88 |