Name
Abstract | ||
|---|---|---|
An efficient and novel technique for computing timing vulnerability factors (TVF) in modern complex synchronous designs is introduced, where all key inputs are based on static timing data readily available in most design databases. The benefits of TVF for modern microprocessors and strategies to reduce TVF, and hence the overall soft error rate (SER), are presented. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/IOLTS.2013.6604051 | On-Line Testing Symposium |
Keywords | Field | DocType |
integrated circuit reliability,microprocessor chips,radiation hardening (electronics),timing,SER reduction,TVF reduction,complex synchronous design,microprocessors,sequential elements,soft error rate reduction,static timing data,timing vulnerability factors,SER,TVF,soft error,timing derating,timing vulnerability factor | Soft error,Computer science,Electronic engineering,Real-time computing,Static timing analysis,Vulnerability factors,Embedded system | Conference |
ISSN | Citations | PageRank |
1942-9398 | 2 | 0.39 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Arkady Bramnik | 1 | 2 | 0.39 |
| Andrei Sherban | 2 | 2 | 0.39 |
| Norbert Seifert | 3 | 2 | 0.73 |