Name
Title | ||
|---|---|---|
Nonvolatile Memory Partitioning Scheme for Technology-Based Performance-Reliability Tradeoff |
Abstract | ||
|---|---|---|
The need to improve nonvolatile memories reliability in embedded systems is a key design concern. We here propose a methodology, managed by the memory controller, that optimizes the data reliability at the physical level for critical data whereas exploiting the transaction performances for noncritical data. The reliability-performance tradeoff is obtained by partitioning the memory addressable space in different functional blocks, each on written by means of a specific optimized writing algorithm. The method feasibility is demonstrated by a case study exploiting phase change memories (PCMs) features. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/LES.2010.2092411 | Embedded Systems Letters, IEEE |
Keywords | Field | DocType |
embedded systems,phase change memories,reliability,data reliability,embedded system,memory addressable space,memory controller,nonvolatile memory partitioning,phase change memory feature,technology-based performance reliability,Data protection,MPSoC,erasing schemes,nonvolatile memory,phase change memory,reliability | Phase-change memory,Computer science,Data reliability,Parallel computing,Real-time computing,Non-volatile memory,Throughput,Data Protection Act 1998,Database transaction,MPSoC,Memory controller | Journal |
Volume | Issue | ISSN |
3 | 1 | 1943-0663 |
Citations | PageRank | References |
2 | 0.44 | 1 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Cristian Zambelli | 1 | 36 | 9.05 |
| Davide Bertozzi | 2 | 1653 | 99.83 |
| A. Chimenton | 3 | 2 | 0.78 |
| P. Olivo | 4 | 342 | 58.07 |