Paper Info
Title
Compiler-aided methodology for low overhead on-line testing
Abstract
Reliability is emerging as an important design criterion in modern systems due to increasing transient fault rates. Hardware fault-tolerance techniques, commonly used to address this, introduce high design costs. As alternative, software Signature-Monitoring (SM) schemes based on compiler assertions are an efficient method for control-flow-error detection. Existing SM techniques do not consider application-specific-information causing unnecessary overheads. In this paper, compile-time Control-Flow-Graph (CFG) topology analysis is used to place best-suited assertions at optimal locations of the assembly code to reduce overheads. Our evaluation with representative workloads shows fault-coverage increase with overheads close to Assertion-based Control-Flow Correction (ACFC), the method with lowest overhead. Compared to ACFC, our technique improves (on average) fault coverage by 17%, performance overhead by 5% and power-consumption by 3% with equal code-size overhead.
Year
DOI
Venue
2013
10.1109/SAMOS.2013.6621126
Embedded Computer Systems: Architectures, Modeling, and Simulation
Keywords
Field
DocType
graph theory,program compilers,program testing,software fault tolerance,ACFC,CFG,SM techniques,assertion-based control-flow correction,compile-time control-flow-graph topology analysis,compiler-aided methodology,control-flow-error detection,important design criterion,low overhead on-line testing,software signature-monitoring schemes,transient fault rates
Graph theory,Fault coverage,Computer science,Software fault tolerance,Compiler,Assembly language,Fault tolerance,Software,Overhead (business),Embedded system
Conference
Citations 
PageRank 
References 
2
0.38
14
Authors
4
Name
Order
Citations
PageRank
Ghazaleh Nazarian182.55
Robert M. Seepers2364.96
Christos Strydis312623.61
Georgi Gaydadjiev471.58