Paper Info
Title
Unifying stream based and reconfigurable computing to design application accelerators
Abstract
To facilitate the design of hardware accelerators we have proposed the adoption of the stream-based computing model and the usage of Graphics Processing Units (GPUs) as prototyping platforms. This model exposes the maximum data parallelism available in the applications and decouples computation from memory accesses. In this paper we go a step further in showing how to use the proposed methodology to accelerate a widely used MrBayes bioinformatics application. In particular, we provide design and implementation procedures and details. We analyze problems faced during the implementation such as the connectivity between the CPU and the FPGA and we provide possible solutions. Experimental results show that our mapping of the stream-based program for the GPU into hardware structures leads to real improvements in performance, scalability and cost. The hardware accelerator allows to reduce the respective processing time up to more that two hundred times while the whole bioinformatics application can run 1.44 faster than by using only the host.
Year
DOI
Venue
2010
10.1109/VLSISOC.2010.5642696
VLSI System Chip Conference
Keywords
Field
DocType
computer graphic equipment,coprocessors,field programmable gate arrays,logic design,reconfigurable architectures,CPU,FPGA,MrBayes bioinformatics application,application accelerator design,graphics processing units,hardware accelerator design,reconfigurable computing,stream based computing
Central processing unit,Computer architecture,Algorithm design,Computer science,Field-programmable gate array,Data parallelism,Hardware acceleration,Coprocessor,Scalability,Reconfigurable computing,Embedded system
Conference
ISBN
Citations 
PageRank 
978-1-4244-6469-2
0
0.34
References 
Authors
7
3
Name
Order
Citations
PageRank
Bruno Francisco100.34
Frederico Pratas211915.69
Leonel Sousa31210145.50