Abstract | ||
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Recently, for use in autonomous vehicles and robots, demand has been increasing for high-speed image recognition that is superior to that of the human eye. However, to recognize numerous images quickly, such systems require many template images to be read out dynamically from memory. They must then be sent to a processor quickly. Achieving such high-speed real-time image recognition operation is difficult because of the bottleneck of the transfer between the memory and the processor. To alleviate that bottleneck, a dynamically reconfigurable vision architecture was proposed. This paper presents 16-gray scale image recognition operation of the proposed architecture. |
Year | DOI | Venue |
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2013 | 10.1109/FPL.2013.6645603 | Field Programmable Logic and Applications |
Keywords | Field | DocType |
computer vision,image recognition,16-gray scale image recognition operation,autonomous robots,autonomous vehicles,dynamically reconfigurable vison architecture,high-speed image recognition,high-speed real-time image recognition operation,human eye,Dynamically re-configurable devices,Field Programmable Gate Arrays,Vision chips | Human eye,Bottleneck,Computer vision,Architecture,Computer science,Artificial intelligence,Robot | Conference |
ISSN | Citations | PageRank |
1946-1488 | 0 | 0.34 |
References | Authors | |
3 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yuki Kamikubo | 1 | 0 | 0.34 |
Minoru Watanabe | 2 | 137 | 43.46 |
Shoji Kawahito | 3 | 270 | 67.13 |