Name
Title | ||
|---|---|---|
Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects |
Abstract | ||
|---|---|---|
As we integrate hundreds of cores in the future, energy-efficiency and scalability of Network-on-Chips (NoCs) has become a critical challenge. In order to achieve higher performance-per-Watt than traditional metallic interconnects, researchers are exploring alternate energy-effident emerging technology solutions. In this paper, we propose to combine two emerging technologies, namely 3D stacking and nanophotonics that can deliver high on-chip bandwidth and low energy/bit to achieve a high-throughput, reconfigurable and scalable NoC for many-core systems. Our simulation results indicate that the execution time can be reduced up to 25% and energy consumption reduced by 23% for Splash-2, PARSEC, SPEC CPU2006 and synthetic benchmarks for 64-core and 256-core versions. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/SLIP.2013.6681676 | System Level Interconnect Prediction |
Keywords | Field | DocType |
integrated circuit interconnections,integrated circuit reliability,nanophotonics,network-on-chip,256-core versions,3D stacked reconfigurable nanophotonic interconnects,64-core versions,NoC,PARSEC,SPEC CPU2006,Splash-2,energy-efficiency,many-core systems,metallic interconnects,network-on-chips,performance evaluation,scalability evaluation,synthetic benchmarks,technology solutions,Nanophotonics,NoCs,Reconfiguration | Parsec,Computer science,Network on a chip,Electronic engineering,Emerging technologies,Bandwidth (signal processing),Spec#,Energy consumption,Control reconfiguration,Scalability,Embedded system | Conference |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Randy Morris | 1 | 34 | 3.72 |
| Avinash Karanth Kodi | 2 | 47 | 3.28 |
| Ahmed Louri | 3 | 398 | 47.97 |