Title
Frequency down-conversion with complementary-MOS inverters
Abstract
This paper focuses on the frequency-down-conversion realized with a proposed Mixer topology using 4 CMOS inverters only. From simulation and using typical 0.35μm CMOS process parameters, the proposed Mixer exhibits at 900MHz under 2.5 supply voltage, the following performances: a 16.8dB conversion gain, a 23dBc-IM3 with 200mVpeak-to-peak input sinusoidal waves. The corresponding IIP3 is 10dBm for a total power consumption of 1.4mW.
Year
DOI
Venue
2010
10.1109/ICECS.2010.5724451
Electronics, Circuits, and Systems
Keywords
Field
DocType
CMOS integrated circuits,UHF integrated circuits,UHF mixers,invertors,CMOS inverter,frequency 900 MHz,frequency-down-conversion,gain 16.8 dB,mixer topology,peak-to-peak input sinusoidal wave,power 1.4 mW,power consumption,size 0.35 mum,voltage 2.5 V,voltage 200 mV
Conversion gain,Computer science,Voltage,Down conversion,CMOS,Cmos process,Electronic engineering,Electronic mixer,Electrical engineering,Sine wave,Power consumption
Conference
ISBN
Citations 
PageRank 
978-1-4244-8155-2
0
0.34
References 
Authors
4
4
Name
Order
Citations
PageRank
Barthelemy, H.111.42
Edith Kussener2319.16
Sylvain Bourdel34114.05
W. Rahajandraibe41410.25